The present invention relates to a Schottky diode semiconductor devices, specifically, to a Schottky diode device having less leakage current and high field breakdown and a method of manufacturing the same.
Schottky diodes are widely used as voltage rectifiers in many power switching applications, such as switching-mode power supplies, electric motor, switching of communication device, industry automation and electronic automation and so on. Though the Schottky diodes have a high speed switching characteristics, the large reverse leakage current and low breakdown voltage will limit the operation of Schottky diodes to a high reverse voltage and with a higher temperature.
It is well known that a p+ guard ring diffusion region surround the periphery of the active Schottky contact area could increase the reverse breakdown voltage (U.S. Pat. No. 3,541,403). The p+ guard ring diffusion region is formed from boron-nitride diffusion source or by boron or BF2+ ion implantation. However, the high dose boron ion implantation will induce surface damage and result in high leakage current. Also, the p-n junction curvature effect, referred to S. M. Sze: xe2x80x9cPhysics of Semiconductor Devicesxe2x80x9d, 2nd, Chapter 2, will significantly affect the reverse leakage current and breakdown voltage. It needs a very long term thermal cycle at high temperature to drive in the boron dopant deep enough into silicon substrate to form a large p-n junction curvature to reduce the reverse leakage current and increase the breakdown voltage.
An object of the present invention is to propose a new method of forming a high switching speed Schottky diode with high breakdown voltage and low leakage current.
A Schottky diode structure and a method of making the same are disclosed. The method comprises following steps: firstly, an n+ semiconductor substrate having a first conductive layer and an nxe2x88x92epi layer is provided. Then a first oxide layer is formed on the nxe2x88x92epi layer. A patterning step to define guard-ring (GR) regions and the first oxide layer at this region is etched out. After stripping the photoresist, a polycrystalline silicon layer is deposited by LPCVD or APCVD. Then, the boron or BF2+ ion implantation is performed. Thereafter, a high temperature annealing process to drive in the boron ions through the polycrystalline silicon layer into the nxe2x88x92epi layer is carried out using the doped polycrystalline silicon layer as a diffusion source. Subsequently, an oxidation process to fully oxidize the polycrystalline silicon layer into thermal oxide and drive in the boron ions deep into silicon substrate is then performed. A second mask and etch steps are then implemented to open the active area (AA) regions. A barrier metal deposition and metal silicidation process is then done. After the top metal formation, the third mask and etch steps are then implemented to define the anode. Finally, a backside metal layer is then formed and served as a cathode.